Samsung flash-forwards with V-NAND memory

The Vertical NAND flash memory is displayed at a press briefing yesterday at Samsung Electronics’ headquarters in Gangnam, southern Seoul. The 3-D V-NAND flash memory is the world’s first. [NEWS1]

Samsung Electronics has begun mass producing the industry’s first three-dimensional (3-D) Vertical NAND flash memory whose innovative structure has made reliability up to 10 times better and doubled write performance and capacity of conventional 20 nanometer NAND flash memories.

The groundbreaking technological advancement also paves the way for upgrading conventional computer storage to that of current supercomputers within five years.

Current NAND flash products rely on 40-year-old planar structures using floating gates. As chip manufacturing technology has proceeded from 30 nanometer (nm) to the more advanced 10 nanometer class and beyond, concerns for a scaling limit arose due to the cell-to-cell interference that causes a tradeoff in the reliability of NAND flash memories, said the world’s top memory chip producer.

Instead of putting memory cells on a conventional 2-D plane, Samsung reworked its long-serving Charge Trap Flash (CTF) technology to create a 3-D cell structure with more breathing room. As a result, the 3-D V-NAND flash memory has improved both reliability and speed at higher densities.

The new chip the size of a fingernail has a capacity of 128 gigabits (Gb), meaning it is able to accommodate 128 billion units of memory storage. Although the size is same as that of Intel and Micron chips, which still use planar NAND technology, most notable achievement for Samsung is the proprietary vertical interconnect process technology that can stack as many as 24 cell layers vertically. The technology uses special etching technology that connects the layers electronically by punching holes from the highest layer to the bottom.

The technological innovation is set to become a stepping stone for realizing a groundbreaking 1 terabit (Tb) NAND flash memory within five years, said Choi Jeong-hyuk, senior vice president of flash products & technology at Samsung, during a press briefing at the Seocho headquarters in southern Seoul.
“How many cell layers can be stacked will be the key,” he added.

One terabit equals 1,000 gigabits, the storage scale of today’s supercomputers.

NAND refers to a computer storage device that can be electrically erased and reprogrammed. It is primarily used in main memory, memory cards, USB drives and solid state drives (SSDs) for storage and data transfer.

Currently, the most-dense process for creating cells to store data on a planar NAND is between 10 nm and 20 nm. A nanometer is a billionth of a meter; a human hair is 3,000 times thicker than NAND flash made with 25 nm process technology. The lower the nm figure, the more integrated and advanced the chip.

The new chip initially will be used for data centers or servers that require high reliability. Samsung plans to apply it to mobile gadgets such as smartphones and tablet PCs in the near future.

Samsung’s Hwaseong plant in Gyeonggi has begun mass production of the product this month and a factory in Xian in China currently being built is set to be operational within a year. Leading chip makers such as SK Hynix, the world’s second player, and Japan’s Toshiba also are developing the 3-D NAND. SK could may begin mass production next year at the earliest.

After nearly 10 years of research on the new product, Samsung acquired more than 300 patent-pending 3-D memory technologies worldwide. The global NAND flash memory market is expected to reach $30.8 billion in revenue by the end of 2016, compared to $23.6 billion at the end of this year, according to market researcher IHS iSuppli.

BY seo ji-eun [spring@joongang.co.kr]