Samsung has new 3-D stacked chip technology

Left: A conventional integrated circuit design. Right: The three-dimensional integration design called X-Cube. [SAMSUNG ELECTRONICS]

Samsung Electronics has test-produced a chip using an advanced three-dimensional design to enhance chip performance and device packing density, the company announced Thursday.

The new integration technology called X-Cube allows layers of integrated circuits to be vertically stacked in a single package.

“Enabled by 3-D integration, the ultra-thin package design features significantly shorter signal paths between the dies for maximized data transfer speed and energy efficiency,” the chipmaker said in a statement. “Customers can also scale the memory bandwidth and density to their desired specifications.”

The X-Cube technology is available for high-performing process nodes including 7 nanometer and 5 nanometer.

The tech giant plans to adopt the design for corporate clients in its chip fabrication or foundry business.

Chips built with the three-dimensional design can be used for advanced technologies including 5G, artificial intelligence, high-performance computing, as well as mobile and wearable devices.

"Samsung's new 3-D integration technology ensures reliable through-silicon via interconnections even at the cutting-edge extreme ultraviolet lithography process nodes," said Kang Moon-soo, senior vice president of Foundry Market Strategy at Samsung Electronics. "We are committed to bringing more 3-D integrated circuit innovation that can push the boundaries of semiconductors.”

Through-silicon via refers to a vertical electrical connection that links chips together on a wafer. Compared to other connectors, it can increase the speed of signals between microchips and reduce the amount of energy required to drive those signals.

BY PARK EUN-JEE [park.eunjee@joongang.co.kr]