Samsung Electronics maintains memory capacity as others cut

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Samsung Electronics maintains memory capacity as others cut

 Lee Jung-bae, president of the memory business at Samsung Electronics, gives a speech at Samsung Tech Day 2022 in San Jose, California, on Oct. 5. [SAMSUNG ELECTRONICS]

Lee Jung-bae, president of the memory business at Samsung Electronics, gives a speech at Samsung Tech Day 2022 in San Jose, California, on Oct. 5. [SAMSUNG ELECTRONICS]

 
Samsung Electronics is maintaining memory chip production capacity despite a glut and falling prices.

 
"There has been no discussion about a cut for now," Han Jin-man, executive vice president at the chipmaker, said on Wednesday. The comments were made at Samsung Tech Day, which was held in San Jose, California.  
 
Samsung Electronics is the world's largest maker of memory chips, with more than 40 percent of the DRAM market.

 
Maintaining production sharply contrasts with the plans of some competitors, who are cutting back in anticipation of continued market weakness.

 
Boise, Idaho's Micron announced last week that it would cut production of dynamic random-access memory (DRAM) and NAND flash chips, the first major memory chipmaker to confirm a production cut. Tokyo's Kioxia made a similar announcement, saying it will reduce NAND Flash capacity at its Yokkaichi and Kitakami facilities by 30 percent.

 
With demand for electronic devices flagging and inventories of devices and chips ballooning, the supply of chips has far outpaced demand, pushing down the prices of DRAM and NAND flash chips.

 
Suwon, Gyeonggi-based Samsung Electronics aims to mass produce 10 nanometer-class DRAMs — 1b in industry jargon — by 2023.  

 
"Samsung's 1b DRAM is currently under development with plans for mass production in 2023," the company said in a statement.  

 
"To overcome challenges in DRAM scaling beyond the 10nm range, the company has been developing disruptive solutions in patterning, materials and architecture, with technology like High-K material well underway," it said.  

 
The High-K technique is a new manufacturing process designed to increase energy efficiency in low-power environments.  

 
A 2024 target was set for the mass production of ninth-generation V-NAND flash chips. Vertical NAND, or V-NAND, is the marketing name the chipmaker uses for architecture where the cells are stacked on a single NAND flash chip to increase density.  

 
By 2030, the company "envisions stacking over 1,000 layers to better enable data-intensive technologies of the future," the company said.  

 
The company's seventh-generation NAND, its latest product, has 176 layers.

 
The competition has been heated as memory chipmakers are vying to stack as many layers as possible.  

 
SK hynix, the second largest memory chip player, announced a 238-layer NAND in August, while Micron started volume production of 232-layer products in July.

BY PARK EUN-JEE [park.eunjee@joongang.co.kr]
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