Samsung wins 2nm chip-manufacturing deal with Japanese AI firm

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Samsung wins 2nm chip-manufacturing deal with Japanese AI firm

Choi Si-young, president of Samsung Electronics' chip contract manufacturing division, speaks during Samsung Foundry Forum held in southern Seoul on Tuesday. [SAMSUNG ELECTRONICS]

Choi Si-young, president of Samsung Electronics' chip contract manufacturing division, speaks during Samsung Foundry Forum held in southern Seoul on Tuesday. [SAMSUNG ELECTRONICS]

 
Samsung Electronics will contract manufacture AI chips for Preferred Networks using its two-nanometer process, which is expected to propel the Korean chipmaker forward in an intense battle with TSMC for orders from AI chip designers.
 
Preferred Networks is a Japanese AI company founded in 2014 specializing in deep learning that has designed its own AI accelerator as well as silicon for supercomputers, attracting investment from an array of big companies including Toyota. Its previous contract manufacturing partner was TSMC.
 
Samsung Electronics' turnkey solution — providing a one-stop service for the client, from design optimization to production and packaging — is believed to have played a crucial role in poaching the Japanese chip designer from TSMC, Samsung's biggest rival.
 
Preferred Networks' AI accelerator will be made using Samsung partner Gaonchips' design optimization as well as Samsung Electronics' advanced 2.5D packaging technology.
 
"Customized turnkey service starting from IP [intellectual property] and interposer to HBM [high bandwidth memory], advanced logic, testing and advanced packaging will help Samsung Electronics' foundry step forward," said Choi Si-young, president at Samsung Electronics' contract manufacturing business in a keynote speech delivered at the Samsung Foundry Forum held in southern Seoul on Tuesday.
 
"By also optimizing the operation process, Samsung's foundry will reduce turnaround time for clients, which will serve as a definite upper edge for Samsung."
 
Samsung Electronics is banking on two-nanometer manufacturing technology to close gap with its biggest rival, TSMC, in the contract manufacturing business.
 
The Korean chipmaker preemptively deployed gate-all-around (GAA) transistor architecture known to enhance performance while reducing power on its three-nanometer technology for the first time in the world in 2022.
 
TSMC is expected to deploy its two-nanometer process in 2025, giving Samsung an early lead in the utilization of the technology.
 
As part of the effort to fortify its turnkey service, Samsung pledged to complete the development of photonics interconnect technology by 2027, replacing copper interconnects with the emerging technology for an expected minimization of signal loss for large-scale infrastructure like data centers, Choi said, which will add to its one-stop turnkey service.
 
"We are excited to lead in AI accelerator technology with Samsung Electronics’ two-nanometer GAA process,” said Junichiro Makino, chief technology officer of Computing Architecture at Preferred Networks.
 
"This solution will significantly support Preferred Networks’ ongoing efforts to build highly energy-efficient, high-performance computing hardware that meets ever-growing computing demands from generative AI technologies, especially large language models."

BY JIN EUN-SOO [jin.eunsoo@joongang.co.kr]
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